; ;******************************************************* ;******************************************************* ;** ** ;** Program prezentacji przerwan od czasu ** ;** ** ;** Andrzej Pawluczuk ** ;** ** ;** Mikrokontroler: AT90S8515 ** ;** ** ;** Bialystok, 2004 ** ;** ** ;******************************************************* ;******************************************************* ; ;******************************************************* .include "8515def.inc" ;******************************************************* .list .listmac ;----------------------------------------------------------------------------- .macro ldz ldi zl,low(@0) ldi zh,high(@0) .endm ;----------------------------------------------------------------------------- .macro pushz push zl push zh .endm ;----------------------------------------------------------------------------- .macro popz pop zh pop zl .endm ;----------------------------------------------------------------------------- .macro pushf push acc in acc,sreg push acc .endm ;----------------------------------------------------------------------------- .macro popf pop acc out sreg,acc pop acc .endm ;----------------------------------------------------------------------------- .def acc = r16 ;----------------------------------------------------------------------------- .equ StatusLED = 0 .equ TimerData = 0xA0 .equ DivideConst = 50 ;----------------------------------------------------------------------------- .equ Stand_GIMSK = 0b00000000 .equ Stand_TIMSK = 0b00000010 .equ Stand_MCUCR = 0b00000000 .equ Stand_TCCR0 = 0b00000100 .equ Stand_TCCR1A = 0b00000000 .equ Stand_TCCR1B = 0b00000000 .equ Stand_UCR = 0b00000000 .equ Stand_UBBR = 47 .equ Stand_PADir = 0b11111111 .equ Stand_PAData = 0b11111111 .equ Stand_PBDir = 0b11111111 .equ Stand_PBData = 0b11111111 .equ Stand_PCDir = 0b11111111 .equ Stand_PCData = 0b11111111 .equ Stand_PDDir = 0b11111111 .equ Stand_PDData = 0b11111111 ;----------------------------------------------------------------------------- .dseg ;******************************************************* ;******************************************************* ;** ** ;** DATA SEGMENT ** ;** ** ;******************************************************* ;******************************************************* TimeDivider : .byte 1 ; Status : .byte 1 ; ;----------------------------------------------------------------------------- .cseg ;******************************************************* ;******************************************************* ;** ** ;** CODE SEGMENT ** ;** ** ;******************************************************* ;******************************************************* .org 0 rjmp ResetProcessor ; ;----------------------------------------------------------------------------- .org INT0addr ;External Interrupt0 Vector Address reti ; ;----------------------------------------------------------------------------- .org INT1addr ;External Interrupt1 Vector Address reti ; ;----------------------------------------------------------------------------- .org ICP1addr ;Input Capture1 Interrupt Vector Address reti ; ;----------------------------------------------------------------------------- .org OC1Aaddr ;Output Compare1A Interrupt Vector Address reti ; ;----------------------------------------------------------------------------- .org OC1Baddr ;Output Compare1B Interrupt Vector Address reti ; ;----------------------------------------------------------------------------- .org OVF1addr ;Overflow1 Interrupt Vector Address reti ; ;----------------------------------------------------------------------------- .org OVF0addr ;Overflow0 Interrupt Vector Address rjmp TC0OvfInterrupt ; ;----------------------------------------------------------------------------- .org SPIaddr ;SPI Interrupt Vector Address reti ; ;----------------------------------------------------------------------------- .org URXCaddr ;UART Receive Complete Interrupt Vector Address reti ; ;----------------------------------------------------------------------------- .org UDREaddr ;UART Data Register Empty Interrupt Vector Address reti ; ;----------------------------------------------------------------------------- .org UTXCaddr ;UART Transmit Complete Interrupt Vector Address reti ; ;----------------------------------------------------------------------------- .org ACIaddr ;Analog Comparator Interrupt Vector Address reti ; ;----------------------------------------------------------------------------- HardwareInit : ; ;**************** ; ldi acc,Stand_GIMSK ; out GIMSK,acc ; ldi acc,Stand_TIMSK ; out TIMSK,acc ; ldi acc,Stand_MCUCR ; out MCUCR,acc ; ldi acc,Stand_TCCR0 ; out TCCR0,acc ; ldi acc,Stand_TCCR1A ; out TCCR1A,acc ; ldi acc,Stand_TCCR1B ; out TCCR1B,acc ; ldi acc,Stand_UCR ; out UCR,acc ; ldi acc,Stand_UBBR ; out UBRR,acc ; ret ; ;----------------------------------------------------------------------------- EnvirInit : ; ;**************** ; ldi acc,Stand_PADir ; out DDRA,Acc ; ldi acc,Stand_PAData ; out PORTA,acc ; ldi acc,Stand_PBDir ; out DDRB,Acc ; ldi acc,Stand_PBData ; out PORTB,acc ; ldi acc,Stand_PCDir ; out DDRC,Acc ; ldi acc,Stand_PCData ; out PORTC,acc ; ldi acc,Stand_PDDir ; out DDRD,Acc ; ldi acc,Stand_PDData ; out PORTD,acc ; ret ; ;----------------------------------------------------------------------------- SoftwareInit : ; ;**************** ; ldi acc,0 ; sts TimeDivider,acc ; sts Status,acc ; ret ; ;----------------------------------------------------------------------------- TC0OvfInterrupt : ; ;**************** ; pushf ; pushz ; ldz TimeDivider ; ld acc,Z ; inc acc ; st Z,acc ; cpi acc,DivideConst ; brne TC0OV_0 ; ldi acc,0 ; st Z,acc ; ldz Status ; ld acc,Z ; inc acc ; st Z,acc ; com acc ; out PORTB,acc ; TC0OV_0 : ; ldi acc,TimerData ; out TCNT0,acc ; popz ; popf ; reti ; ;----------------------------------------------------------------------------- ClearRegs : ; ;**************** ; clr R0 ; ldz 0x1D ; ClrR_0 : ; st Z,R0 ; dec Zl ; brne ClrR_0 ; ret ; ;----------------------------------------------------------------------------- ClearRAM : ; ;*************** ; ldz RAMEND-1 ; clr acc ; CleRA_0 : ; st -Z,acc ; ; cpi ZH,0 ; brne CleRA_2 ; cpi ZL,0x60 ; brne CleRA_2 ; rjmp CleRA_1 ; CleRA_2 : ; rjmp CleRA_0 ; CleRA_1 : ; ret ; ;----------------------------------------------------------------------------- ResetProcessor : ; cli ; ldi acc,HIGH(RAMEND) ; out SPH,acc ; ldi acc,LOW(RAMEND) ; out SPL,acc ; ; rcall ClearRAM ; rcall ClearRegs ; rcall HardwareInit ; rcall EnvirInit ; rcall SoftwareInit ; sei ; Main_0 : ; rjmp Main_0 ; ; ;----------------------------------------------------------------------------- .exit